PIC16C63A-04I/SO【PDF 184/184 页】IC MCU OTP 4KX14 PWM 28SOIC

收藏本站

您好，
买卖IC网欢迎您。
请登录
免费注册

买卖IC网

Sheet目录3841

180页 181页 182页 183页 [184页]

SAM7S Series [DATASHEET]

6175M–ATARM–26-Oct-12

If an access is done in the address area 0x0030 000 to 0x003F FFFF, no abort is generated.

Figure 18-3. Internal Memory Mapping

18.3.2.2

Internal Memory Area 0

The first 32 bytes of Internal Memory Area 0 contain the ARM processor exception vectors, in particular, the Reset

Vector at address 0x0.

Before execution of the remap command, the on-chip Flash is mapped into Internal Memory Area 0, so that the

ARM7TDMI reaches an executable instruction contained in Flash. After the remap command, the internal SRAM at

address 0x0020 0000 is mapped into Internal Memory Area 0. The memory mapped into Internal Memory Area 0 is

accessible in both its original location and at address 0x0.

18.3.3

Remap Command

After execution, the Remap Command causes the Internal SRAM to be accessed through the Internal Memory

Area 0.

As the ARM vectors (Reset, Abort, Data Abort, Prefetch Abort, Undefined Instruction, Interrupt, and Fast Interrupt)

are mapped from address 0x0 to address 0x20, the Remap Command allows the user to redefine dynamically

these vectors under software control.

The Remap Command is accessible through the Memory Controller User Interface by writing the MC_RCR

(Remap Control Register) RCB field to one.

The Remap Command can be cancelled by writing the MC_RCR RCB field to one, which acts as a toggling com-

mand. This allows easy debug of the user-defined boot sequence by offering a simple way to put the chip in the

same configuration as after a reset.

18.3.4

Abort Status

There are three reasons for an abort to occur:

access to an undefined address

an access to a misaligned address.

When an abort occurs, a signal is sent back to all the masters, regardless of which one has generated the access.

However, only the ARM7TDMI can take an abort signal into account, and only under the condition that it was gen-

erating an access. The Peripheral DMA Controller does not handle the abort input signal. Note that the connection

is not represented in Figure 18-1.

256M Bytes

Internal Memory Area 0

Undefined Areas

(Abort)

0x0000 0000

0x000F FFFF

0x0010 0000

0x001F FFFF

0x0020 0000

0x002F FFFF

0x0FFF FFFF

1M Bytes

253M bytes

Internal Memory Area 1

Internal Flash

Internal Memory Area 2

Internal SRAM

0x0030 0000

发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

*型号	*数量	厂商	批号	封装

添加更多采购

采购需求

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

我的联系方式